Reducing the size of devices and circuits residing on semiconductor chips provides many advantages, such as allowing greater device density, increasing operating speed, reducing power losses, generating less heat, and enhancing portability. However, as devices become smaller and more closely spaced on a die, patterning the circuit connections between the devices, in a manner that takes full advantage of the small size of the devices, becomes more difficult. Closely spaced narrow lines are necessary, as the size and spacing of devices are reduced.
Photolithography permits fabrication of very fine metal lines to connect the devices on a substrate. Customarily, connections between devices are formed by depositing a conductor layer such as aluminum alloy or copper alloy on a substrate and using ordinary lithography to pattern a circuit. Unfortunately, however, the fineness of circuits produced by photolithography is limited by the wavelength of the radiation used.
Lithography generally includes a step of exposing a substrate layer (for example, metal) to radiation that has passed through a photo-mask that has itself been formed by lithography, to transfer a pattern from the photo-mask to the substrate layer. Although the size of the pattern can be reduced by optical and other means, the wavelength of the radiation used remains a fundamental limit to resolution in lithography. The width of the lines that can be patterned cannot be narrower than the wavelength used, when ordinary modem lithography is employed.
For this reason, lithography of circuits generally uses very short wavelengths, such as, deep-UV radiation, for circuit patterning. Deep-UV lithography involves patterning of substrates with circuits with various lines of the deep-UV spectrum, including the E, G, H, and I lines (having very short wavelengths of 546 nm, 436 nm, 405 nm, and 365 nm, respectively). The I line of the deep-UV band allows a minimum feature size of approximately 248 nm (2480 .ANG., or "quarter micron"). However, even this extremely fine resolution is not satisfactory for the narrower patterns that would take full advantage of the size reduction in semiconductor devices themselves.
It is possible to obtain greater resolution by using shorter wavelengths, but the resists and technologies that are matched to such shorter wavelengths present difficulties that make them unsuitable or too costly for lithographic applications. Many resists cannot withstand the stresses created during lithography, and plasma or ion-beam etching can remove or degrade resists. Moreover, many semiconductor device fabrication technologies (for example excimer lasers) are difficult to use, expensive, suffer from optical aberrations, and require frequent maintenance. Finally, even if equipment and resists could be found for the shorter wavelengths, the tremendous existing investment for present lithographic technologies would make a complete overhaul of such technologies impractical.
Another approach to reducing device size by increasing the resolution of photolithography is optical refraction. Optical refraction in lithography relies on overlapping patterns of constructive and destructive interference created as radiation passes through slots or gaps. In mask photolithography, optical refraction can be produced in either bright-field or dark-field masks by placing slots in different mask regions located near one another. The patterns of interference emerging from the mask show points of constructive and destructive interference. Refractive methods also include placing an additional mask layer, which is transparent and phase-shifting to the wavelength used, on the bottom or top of the mask at certain locations and not at other locations, thereby moving the constructive and destructive interference patterns according to the pattern desired. The material used needs to be matched to the resist and to the wavelength, and can be difficult to align. Such techniques also suffer from difficulties when the pattern of the circuit to be imaged is highly irregular. Also, adjacent areas of constructive interference are often seen as a single large region, and are not resolved in some cases.